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Formal VLSI Correctness Verification: VLSI Design Methods (Volumes I and II)

Illustrator(s):

-

Binding:

Hardcover

Volume Condition:

Very Good

Dust Jacket:

No

Dust Jacket Condition:

N/A

Dust Jacket Protection:

Edition:

Impression:

Signature:

Language:

English

Publisher Name:

Publication Year:

1990

Publication Place:

Amsterdam, NL

ISBN:

Book ID:

024651

£20.20

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Complete in two volumes. xvi, 414pp, with some charts, tables, diagrams etc in text; xvi, 428pp, with charts, tables etc in text. Both volumes uniformly bound in green cloth-covered boards with black relief decorations and white lettering front and spine. 8vo. Very gently pushed at spine ends. Previous owner’s initials on front free endpapers and occasional neat pencil annotations else neat, clean, bright and tight throughout. The proceedings of the IFIP WG International Workshop on Applied Formal Methods for Correct VLSI [Very Large Scale Integration] Design, 1989. VSLI is the process of created an integrated circuit by combining billions of MOS transistors onto a single chip.

Formal VLSI Correctness Verification: VLSI Design Methods (Volumes I and II)

ID: 024651

Price: £20.20

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